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Arsitektur dan Organisasi Komputer : Arsitektur Intel x86

Intel x86 Architecture Evolution

8080 

• The world’s 1st general-purpose microprocessor. 
• 8-bit machine. 
• 8-bit data path to memory. 
• Was used in the first personal computer, the Altair.

8086

• 16-bit machine. 
• wider data path. 
• larger registers. 
• instruction cache / queue, that prefetches instructions before execution. 
• It’s variant: 8088, is IBM’s 1st personal computer. 
• 1st appearance of the x86 architecture. 
• 1-MByte memory addressing.

80286 

• extension of 8086, enabled addressing a 16-MByte memory. 

80386 

• Intel 1st 32-bit machine.
• support multitasking. 
• could run multiple programs at the same time. 

80486 

• more sophisticated and powerful cache technology. 
• sophisticated instruction pipelining. 
• built-in math coprocessor.

Pentium 

• use of superscalar technology. 
• allows multiple instructions to execute in parallel. 

Pentium Pro 

• aggressive use of register renaming. 
• branch prediction, data flow analysis, speculative execution. 

Pentium II 

• Intel MMX technology. 
• designed to process video, audio, and graphic data efficiently. 

Pentium III 

• additional floating-point instructions to support 3D graphics software.

Pentium 4 

• Addition floating-point and other enhancements for multimedia. 

Pentium M / Core 

• The 1st Intel x86 microprocessor with a dual core . 
• implementation of two processor on a single chip. 

Pentium D 

• 64 bit 
• high frequency, SSE3 

Core 2 ( Centrino )

• extends to 64-bit. 
• Core 2 Quad provides 4 processors on a single chip.

Intel Core i3, i5, i7 

• Hyper-Threading 
• Intel Turbo Boost 

Xeon

• Dedicated for multi-threading ( usually used for workstation )

Atom 

• 32 bit 
• very-low-power 

Intel Core (2nd Gen, 3rd Gen - 8th Gen) 

• High clock rate 
• onboard GPU

Intel Core i9 ( 7th Gen upwards )

• Much faster than i7 ( dedicated for rendering )

8088 Memory Architecture

The 8088 can address 1 MB of memory. However, it has no registers larger than 16-bits. 1MB = 210 x 210 Bytes. 16-bit -> 210 x 26 memory addresses 

The 8088 broke up memory into segments called paragraphs.

The address of a specific byte in memory is the sum, after an appropriate shift, of two registers. Intel processors with 32 bit registers still store paragraph boundary using 16 bits, but use a 32-bit offset to the address.

8088 Memory Organization

Generally consists of program, data, stack. Their memories occupy the same memory space. Total addressable memory size is 1 MB.

Registers

Registers are used to store segment and offset values. These registers are still present in today’s Intel architectures. The programming model of the 8086 through the Pentium II’s considered to be program visible. Its registers are used during application programming and are specified by the instructions. 

Other registers, are considered to be program invisible. They are not addressable directly during applications programming, but may be used indirectly during system programming.

Only the 80286 and above contain the program-invisible registers used to control and operate the protected memory system. The earlier 8086, 8088, and 80286 contain 16-bit internal architectures, a subset of the registers. The 80386, 80486, Pentium, Pentium Pro, and Pentium II microprocessors contain full 32-bit internal architectures. The architectures of the earlier 8086 through the 80286 are fully upward-compatible to the 80386 through the Pentium II.

The Programming Model of Intel

16-bit architecture

• 8086 
• 8088 
• 80286 

32-bit architecture 

Shaded area are additional registers for these types

• 80386 
• 80486 
• Pentium 
• Pentium Pro 
• Pentium II 

The programming model contains 8-, 16-, and 32-bit registers. The 8-bit registers: AH AL BH BL CH CL DH DL are referred to when an instruction is formed using these two-letter designations. The 16-bit registers are AX BX CX DX SP BP DI SI IP FLAGS CS DS ES SS FS GS. The extended 32-bit registers are EAX EBX, ECX EDX ESP EBP EDI ESI EIP EFLAGS. These 32-bit extended registers, and 16-bit registers ES and GS are available only in the 80386 and above.

Some registers are general purpose or multipurpose registers, while some have special purposes. The multipurpose registers include EAX EBX ECX EDX EBP EDI ESI. Hold various data sizes (bytes, words, or doublewords) and are used for almost any purpose, as dictated by a program.

Register Types

1. General-purpose/multipurpose register 

• Data registers : EAX, EBX, ECX, EDX 
• Offset registers : EBP, EDI, ESI 

2. Special-purpose register 

• Offset registers: EIP, ESP 
• Segment registers: CS, DS, ES, SS, FS, GS 
• EFLAGS

Data Register

The four 32-bit data registers are EAX EBX ECX EDX. Each addressable as 32-bit registers, 16-bit registers (the lower 16 bits), or two 8-bit registers :

EAX ( accumulator ) 

Used for instructions such as addition, subtraction, multiplication, division, and some of adjustment instructions. In 80386 above, it may also hold the offset address of a location in the memory system. 

EBX ( base index ) 

BX sometimes hold the offset address of a location in the memory system. In 80386 above, EBX also can address memory data.

ECX ( counter ) 

Hold the count for various instructions: repeated string instructions (REP/REPE/REPNE), shift, rotate, and LOOP/LOOPD. In 80386 above, it also can hold the offset address of memory data. 

EDX ( data ) 

Holds a part of the result from a multiplication or part of the dividend before a division.

Offset Registers

IP ( instruction pointer ) 

Addresses the next instruction in a section of memory defined as code segment. It used to find the next sequential instruction in a program located within the code segment. Can be modified with a jump or a call instruction. 

SP ( stack pointer ) 

Addresses an area of memory called stack. Its stacks memory stores data through this pointer. 

BP ( base pointer ) 

BP also an offset for stack segment. It points to a memory location for memory data transfer.

SI ( source index ) 

Addresses source string data for the string instructions. Offset for the data segment. 

DI ( destination index ) 

Addresses string destination data for the string instructions. Offset for the data segment or extra segment.

These registers are still used today, but have been expanded to 32 bits. These registers have been respectively rename EIP, ESP, EBP, ESI and EDI.

Segment Registers

CS ( code segment ) 

Holds the code (programs and procedures) used by microprocessor, defines the starting address of the section of memory holding code. 

DS ( data segment ) 

Contains most data used by a program. Can be accessed by an offset address. 

ES ( extra segment ) 

Used by some of the string instructions to hold destination data. 

SS ( stack segment ) 

Defines the area of memory used for the stack. 

FS & GS ( stack ) -> 80386 above only 

Allow 2 additional memory segments for access by programs.

Status Flag Register

EFLAGS 

Indicate the condition of the microprocessor as well as control its operation. Upward-compatible from the 8086/8088 to the Pentium II microprocessor. The 8086-80286 contain a FLAG register (16 bits) and the 80386 and above contain an EFLAG register (32-bit extended flag register).

The rightmost five flag bits and the overflow flag change after many arithmetic and logic in­structions execute. The flags never change for any data transfer or program control operation. Some of the flags are also used to control features found in the microprocessor. 

EFLAG and FLAG register (8086 -> Pentium)

C ( carry )

• holds the carry after addition or the borrow after subtraction.
• also indicates error conditions as dictated by programs and procedures.

P ( parity )

• a count of ones in a number expressed as even or odd.
• 0 : odd parity, 1: even parity.
• E.g : If a number contains 3 binary one bits, it has odd parity. If a number contains zero one bits, it has even parity.

A (auxiliary carry)

• holds the carry (half-carry) after addition or the borrow after subtraction between bits position 3 and 4 of the result. 
• Used for decimal arithmetic using the low order four bits of AL

Z ( zero ) 

• shows that the result of an arithmetic or logic operation is zero 
• 1: result equals zero, 0: otherwise.

S ( sign ) 

• holds the arithmetic sign of the result after an arithmetic or logic instruction executed. 
• 1: negative, 0: positive. 

O ( overflow )

• indicates that the result has exceeded the capacity of the machine.

T ( trap )

• enables trapping through an on-chip debugging feature.
• 1: interrupts the flow of the program.
• 0: trapping/debugging feature is disabled.

I ( interrupt )

• controls the operation of the INTR (interrupt request) input pin.
• 1: INTR pin is enabled.
• 0: INTR pin is disabled.

D (direction)

• selects either the increment or decrement mode for the DI and/or SI registers during string instruction.

IOPL (I/O privilege level)

NT (nested task)

RF (resume)

VM (virtual mode)

AC (alignment check)

VIF (virtual interrupt flag)

VIP (virtual interrupt pending)

ID (identification)

Operation Modes

Real mode operation 

• the only mode available in 8086/8088. 
• allows the microprocessor to address only the first 1MB of memory space.

Protected mode operation 

• only in 80286 and above. 
• allows the microprocessor to address above the first 1MB of memory as well as within the first 1MB of memory

Real Mode

The DOS operating system requires the microprocessor to operate in the real mode. Real mode operation allows application software written for the 8086/8088 to function in the 80286 and above without changing the software.

Read Mode uses segment and an offset registers. Segment defines the beginning address of any 64KB memory segment. Offset selects any location within 64KB memory segment.

E.g. : 

• segment : 1000H 
• offset : F000H 
• shift 1000H by 1 place -> 10000H 
• add 10000H + F000H 
• so, memory the location is 1F000H

Absolute Memory Location

(Segment value * 16) + Offset value

Memory address written as segment:offset

Default {segment:offset} in real mode (8086 - 80286)

Protected Mode

Segment address is no longer present, substituted with selector and descriptor. But, offset is still present !

• Selector : selects a descriptor from a descriptor table. 
• Descriptor : describes the memory segment’s location, length, and access rights. 

The instructions are identical with real mode. Most programs written to function in real mode will function without change in the protected mode.

2 descriptor tables with the segment registers :

• Global (system) descriptors : contain segment definition that apply to all programs. 
• Local (application) descriptors : contain segment definition that unique to an application. 

Each descriptor tables contains 8,192 descriptors

Example of the accessing using protected-mode

Instruction Set

Data moving instructions. 

• Arithmetic - add, subtract, increment, decrement, convert byte/word and compare. 
• Logic - AND, OR, exclusive OR, shift/rotate and test. 
• String manipulation - load, store, move, compare and scan for byte/word. 
• Control transfer - conditional, unconditional, call subroutine and return from subroutine. 
• Input/Output instructions. 
• Other - setting/clearing flag bits, stack operations, software interrupts, etc.

Types of Operands

• Addresses 
• Numbers 
• Integer/floating point. 
• Characters 
• ASCII etc. 
• Logical Data 
• Bits or flags. 
• (Aside: Is there any difference between numbers and characters? Ask a C programmer!)

General Data Types

• 8 bit (Byte) 
• 16 bit (word) 
• 32 bit (double word) 
• 64 bit (quad word) 
• 128 bit (double quadword) 

Addressing is by 8 bit unit. Words do not need to align at even-numbered address. Data accessed across 32 bit bus in units of double word read at addresses divisible by 4. It classified as a little endian.

Numeric Data Types

Byte Ordering

What order do we read numbers that occupy more than one byte ?

e.g. (numbers in hex to make it easy to read)

• 12345678H can be stored in 2 x 16-bit locations as follows

Big Endian 

• Left to Right 
• Most significant byte in the lowest numerical byte address

Little Endian

• Right to Left 
• Least significant byte in the lowest numerical byte address

C Data Structure to Endian Mapping

References

http://www.cs.mcgill.ca/~adenau/teaching/cs573/Intel_x86.pdf 

https://www.byclb.com/TR/Tutorials/microprocessors/ch2_1.htm 

Stalling, William. (2013). Computer Organization and Architecture Designing for Performance.9th Ed. USA: Pearson.

http://informatika.unpar.ac.id/

Slide AOK : Architecture of Intel x86